Re: Switchless ROMs

From: Hegedűs István <hegedusis_at_t-online.hu>
Date: Thu, 22 Dec 2016 21:18:47 +0100
Message-ID: <4514029F07F6484CA737C78200CB1FE9@emea.hpqcorp.net>
Hi,

That switching mechanism is a brilliant idea! In my FPGATED based Plus4 
implementation I was just thinking on how to do the ROM switching. I am 
using the Papilio Pro board's SDRAM for the ROM images and as it has 
relatively large space I designed it to be able to keep 16 variants of each 
ROM (Kernal, Basic, Function, Cartridge1 and Cartridge2). My sdram 
controller has an address extension for it and by setting the correct 
variant version for each we can change ROMs (ROMs are uploaded to SDRAM from 
the FPGA's flash chip during boot). I have planned to use a register for it 
in the IO space and startup the computer with the stock ROMs. A Boot kernal 
is a good idea, the FPGA can check a pressed key during power on and set the 
ROM choosing Kernal then reset!

Regards
Istvan


-----Original Message----- 
From: Michał Pleban
Sent: Thursday, December 22, 2016 11:16 AM
To: cbm-hackers@musoftware.de
Subject: Re: Switchless ROMs

Hello!

Jim Brain wrote:

> It seems like those are the only two options.  I looked at the
> switchless ROM circuits (basically, a '74 hooked up to RESET as CLK and
> RESTORE as D, and I thought a small uC or GAL might also work. Still, it
> requires 2 wires.  But, then I wondered if one could have the 64 or 128
> act as the uC, and make the ROM switch.

I designed something similar few years ago, though it was more
complicated beacuse it was meant to be reprogrammable from the C64 side.
But some ideas can be reused in a simple project like this.

Basically what I did was to remove the SID (as I recall, it is always
socketed in a C64), and put it back on a small PCB that goes to the SID
socket, but also steals the SID "chip enable", PHI0, R/W and RESET
signals and routes them to the second PCB that is inserted into the
KERNAL socket.

Using these signals, you can create a simple latch which resides
somewhere in the SID address space and is used to select the appropriate
KERNAL. Upon reset, the latch would be reset to 0 to select the "KERNAL
selection KERNAL", which would write the desired KERNAL number to the
latch as well as a special bit to disable the latch until next RESET.

This is exactly the same thing that our MultiMAX cartridge does - the
latch is set to bank 0 upon reset, then the software in bank 0 writes
the bank number to the latch, setting also bit 7 which means "disable
the latch". You can do that with a 74LS273 plus some simple glue logic
- you should have MultiMAX the schematic somewhere as you drew it
yourself ;-)

Regards,
Michau.

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Received on 2016-12-22 21:00:02

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